EX · CPU ontology dimension

Execution Organization

Execution organization defines the temporal shape of work: multi-cycle sequencing, pipelines, superscalar issue, out-of-order windows, VLIW bundles, and SIMD lanes.

latency is not throughput once work can overlap

Overlap Form

Multi-Cycle

Instructions reuse internal resources across phases before the next instruction completes.

Scalar Pipeline

One instruction enters per cycle while stages overlap.

Superscalar

Multiple operations can issue in a cycle when dependencies and resources permit.

Out-of-Order

The CPU executes ready operations around stalled ones while preserving architectural results.

VLIW / SIMD

Parallelism is exposed in bundles or lanes rather than discovered entirely by hardware.

Hazard Discipline

Software Visible

Delays or scheduling burdens are partly exposed to software.

Interlocked

Hardware detects hazards and stalls when needed.

Forwarded

Bypass networks reduce producer-consumer latency.

Renamed

Register renaming removes false dependencies.